Partner Main tasks Involved people
IMEC
Project coordination
Providing RRAM stack
Specification single RRAM cells
Design of test vehicle
Characterization

Gouri Kar
Veroni Ballet
Andrea Fantini
     
Globalfoundries
Development of:
22nm FDSOI technology
Sensing transistor/MRAM cells

 Sabine Kolodinski
     
Fraunhofer
Design fundamental analog and mixed-signal IPs
Providing RRAM stack
Integration of resistive switching memory

 Martin Landgraf

Uwe Eichler

     

ST microelectronics

SoC and microcontrollers development  Pascal Urard
     
IMEC-NL
Specification IoT sensor nodes incl.
Novel NV memory solution
Implement key building blocks
Integration, quantification and demonstration

 Benjamin Buzse
     

TUDRESDEN


Development of key mixed-signal circuits
Integration
Development of a NoC
Setup a demonstrator platform HW

 Sebastian Haas

 Christian Mayr

     
IDT
Development of new and innovative IP for power management
Evaluation

 Hans-Juergen Brand
     
CEZAMAT
Explore, define and improve the architectures and firmware
Design and realization of a PCB board enabling the mix of several methodologies

 Katarztyna Kolys

Marcin Lelit

     
SURECORE
Requirements for low power and non-volatile memory
Characterization and development on SST-MRAM
Development of test chip

 Paul Wells

Stefan Cosemans

     
TECHNOLUTION
Requirements and demonstration

 Gilles Dondorp
     
INTRINSIC ID
Security requirements
Security for IoT
Integreation

 Georgios Selimis
     
Soitec
Explore and develop a FDSOI advanced substrate

 Francois Brunier
     
DreamChip
Development of a HDR image sensor processing solution

 Jens Benndorf
     
Singulus
Optimize SST-MRAM stacks

 Juergen Langer
     
Intelligent Fluids
Smart eco-friendly photoresist stripping

 Justus von Sonntag
     
Synopsys
Processor IP and IoT focused HW/SW subsystem IP

 Wido Kruijtzer
     
ST microelectronics
Resistive memories Integration

 Philippe Boivin